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Semiconductor device
A transistor region is a region where a plurality of MOS transistors, including an MOS transistor, are formed, and a dummy region is a region lying under a spiral inductor. In the dummy region, a plurality of dummy active layers are disposed in the main surface of an SOI substrate and a plurality of dummy gate electrodes are disposed covering the respective dummy active layers. The arrangement pattern of the dummy active layers and the arrangement pattern of the dummy gate electrodes nearly match, so that the dummy gate electrodes are aligned accurately on the dummy active layers.
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| Semiconductor+device |
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Semiconductor device
A semiconductor device has an electrode pad, a capacitor and a substrate. The substrate has a given area on which the electrode pad and the capacitor are arranged. The electrode pad and the capacitor are arranged on the substrate so that each of at least two sides of the capacitor and each of at least two sides of the electrode pad is adjacent to each other at a given interval. The capacitor has a connecting side that connects the two sides of the capacitor and faces to the electrode pad. Outside angles of the capacitor formed by the connecting side and the two sides of the capacitor are more than 90 degrees.
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| Semiconductor+device |
Semiconductor integrated circuit device with a stacked gate including a floating gate and a control gate
A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.
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| Semiconductor+integrated+circuit+device+with+a+stacked+gate+including+a+floating+gate+and+a+control+gate |
Nonvolatile semiconductor memory
A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
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| Nonvolatile+semiconductor+memory |
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Light-emitting diode for decoration
A light emitting diode includes a light emitting body, a lead frame supplying power to the light emitting body and a light transmitting resin covering the light emitting body and part of the lead frame. The top surface of the light transmitting resin is formed as a plane at a position that satisfies a condition in which part of radiated light from the light emitting body is totally reflected. An inclined surface is formed at a position that satisfies a condition in which part of the radiated light is refracted in a downward direction away from a line perpendicular to the inclined surface.
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| Light-emitting+diode+for+decoration |
Semiconductor device
A semiconductor device of this invention is a vertical power MOSFET having a plurality of first trenches where a trench gate is formed. It has a first column region of a second conductivity type placed beneath the first trenches and formed vertically in an epitaxial layer of a first conductivity type, and a second column region of the second conductivity type placed beneath a base region between the first trenches and formed vertically in the epitaxial layer of the first conductivity type. A sum of depletion charge in the first and the second column regions is substantially equal to depletion charge in the epitaxial layer of the first conductivity type.
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| Semiconductor+device |
System and method for providing a self heating adjustable TiSi2 resistor
A system and method is disclosed for providing a self heating adjustable titanium disilicon (TiSi 2 ) resistor. A triangularly shaped layer of polysilicon is placed a layer of insulation material. A layer of titanium is applied over the polysilicon and heated to form a layer of C49 type of TiSi 2 . A current is then applied to the small end of the triangularly shaped layer of C49 TiSi 2 . The current generates heat in a high resistance portion of the triangularly shaped layer of C49 TiSi 2 and converts a portion of the C49 TiSi 2 to C54 TiSi 2 . The lower resistance of the C54 TiSi 2 decreases the effective resistance of the resistor. A desired value of resistance may be selected by adjusting the magnitude of the applied current.
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| System+and+method+for+providing+a+self+heating+adjustable+TiSi2+resistor |
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